سلام
فیلم های آموزشی سایت Xilinx یکی از بهترین منابع برای یادگیری مفهومی و عملی fpga هست.
http://www.xilinx.com/training/free-video-courses.htm
همونطور که می دونین این سایت اجازه دانلود فیلم ها رو به ایران نمیده. من خیلی هاش دانلود کردم ( با کلی دردسر. vpn و عوض کردن اکانت و ...)
تو persiangig پلود کردم. فایل zip خود فیلم، و فایل word متن آموزش (واسه اونایی که مثل من متوجه نمیشن چی میگه!)
http://spiderman.persiangig.com/xilinxvideo
[ ] achieving-timing-closure.doc 73K
[ ] achieving-timing-closure.zip 7.4M
[ ] architecture-wizard-and-io-planning.doc 84K
[ ] architecture-wizard-and-io-planning.zip 7.8M
[ ] avoid-routing-congestion.doc 36K
[ ] avoid-routing-congestion.zip 2.8M
[ ] basic-hdl-coding-techniques-part1.doc 58K
[ ] basic-hdl-coding-techniques-part1_2.zip 7.0M
[ ] benefits-of-area-constraints.doc 72K
[ ] benefits-of-area-constraints.zip 5.0M
[ ] chipscope-pro-software-overview.doc 76K
[ ] chipscope-pro-software-overview_2.zip 13M
[ ] chipscope_lab_files.zip 5.6M
[ ] core-generator-software-system.doc 52K
[ ] core-generator-software-system.zip 5.5M
[ ] create-area-constraints-with-planahead.doc 72K
[ ] create-area-constraints-with-planahead.zip 7.2M
[ ] embedded-microblaze.doc 74K
[ ] embedded-microblaze.zip 11M
[ ] embededd-edk.doc 72K
[ ] embededd-edk.zip 10M
[ ] fpga-power-management-hdl-coding-techniques.doc 41K
[ ] fpga-power-management-hdl-coding-techniques.zip 2.7M
[ ] global-timing-constraints.doc 55K
[ ] global-timing-constraints.zip 7.2M
[ ] how-to-configure-an-fpga-part1.doc 76K
[ ] how-to-configure-an-fpga-part1.zip 7.5M
[ ] power-estimation.doc 54K
[ ] power-estimation.zip 6.6M
[ ] power-requirements-of-my-fpga.doc 38K
[ ] power-requirements-of-my-fpga.zip 2.7M
[ ] resolve-routing-congestion.doc 41K
[ ] resolve-routing-congestion.zip 2.9M
[ ] spartan-3-fpga-hdl-coding-techniques-part1.doc 83K
[ ] spartan-3-fpga-hdl-coding-techniques-part1.zip 9.4M
[ ] spartan-6-clocking-resources.doc 75K
[ ] spartan-6-clocking-resources.zip 11M
[ ] spartan-6-slice-and-io-resources.doc 62K
[ ] spartan-6-slice-and-io-resources.zip 8.0M
[ ] synthesis-options.doc 76K
[ ] synthesis-options.zip 7.9M
[ ] sysgen-labs.zip 1.3M
[ ] timing-closure.doc 67K
[ ] timing-closure.zip 9.5M
[ ] xst-synthesis-options.doc 53K
[ ] xst-synthesis-options.zip 6.5M
فیلم های آموزشی سایت Xilinx یکی از بهترین منابع برای یادگیری مفهومی و عملی fpga هست.
http://www.xilinx.com/training/free-video-courses.htm
همونطور که می دونین این سایت اجازه دانلود فیلم ها رو به ایران نمیده. من خیلی هاش دانلود کردم ( با کلی دردسر. vpn و عوض کردن اکانت و ...)
تو persiangig پلود کردم. فایل zip خود فیلم، و فایل word متن آموزش (واسه اونایی که مثل من متوجه نمیشن چی میگه!)
http://spiderman.persiangig.com/xilinxvideo
[ ] achieving-timing-closure.doc 73K
[ ] achieving-timing-closure.zip 7.4M
[ ] architecture-wizard-and-io-planning.doc 84K
[ ] architecture-wizard-and-io-planning.zip 7.8M
[ ] avoid-routing-congestion.doc 36K
[ ] avoid-routing-congestion.zip 2.8M
[ ] basic-hdl-coding-techniques-part1.doc 58K
[ ] basic-hdl-coding-techniques-part1_2.zip 7.0M
[ ] benefits-of-area-constraints.doc 72K
[ ] benefits-of-area-constraints.zip 5.0M
[ ] chipscope-pro-software-overview.doc 76K
[ ] chipscope-pro-software-overview_2.zip 13M
[ ] chipscope_lab_files.zip 5.6M
[ ] core-generator-software-system.doc 52K
[ ] core-generator-software-system.zip 5.5M
[ ] create-area-constraints-with-planahead.doc 72K
[ ] create-area-constraints-with-planahead.zip 7.2M
[ ] embedded-microblaze.doc 74K
[ ] embedded-microblaze.zip 11M
[ ] embededd-edk.doc 72K
[ ] embededd-edk.zip 10M
[ ] fpga-power-management-hdl-coding-techniques.doc 41K
[ ] fpga-power-management-hdl-coding-techniques.zip 2.7M
[ ] global-timing-constraints.doc 55K
[ ] global-timing-constraints.zip 7.2M
[ ] how-to-configure-an-fpga-part1.doc 76K
[ ] how-to-configure-an-fpga-part1.zip 7.5M
[ ] power-estimation.doc 54K
[ ] power-estimation.zip 6.6M
[ ] power-requirements-of-my-fpga.doc 38K
[ ] power-requirements-of-my-fpga.zip 2.7M
[ ] resolve-routing-congestion.doc 41K
[ ] resolve-routing-congestion.zip 2.9M
[ ] spartan-3-fpga-hdl-coding-techniques-part1.doc 83K
[ ] spartan-3-fpga-hdl-coding-techniques-part1.zip 9.4M
[ ] spartan-6-clocking-resources.doc 75K
[ ] spartan-6-clocking-resources.zip 11M
[ ] spartan-6-slice-and-io-resources.doc 62K
[ ] spartan-6-slice-and-io-resources.zip 8.0M
[ ] synthesis-options.doc 76K
[ ] synthesis-options.zip 7.9M
[ ] sysgen-labs.zip 1.3M
[ ] timing-closure.doc 67K
[ ] timing-closure.zip 9.5M
[ ] xst-synthesis-options.doc 53K
[ ] xst-synthesis-options.zip 6.5M
دیدگاه