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مشکل با nrf24l01+

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    #1

    مشکل با nrf24l01+

    با سلام خدمت همگی دوستان
    من میخوام که ماژول nrf24l01 رو راه اندازی کنم اما با مشکل مواجه شدم. برنامه رو میزارم تا دوستانیکه تجربه ای در راه اندازی این ماژول دارند بنده رو راهنمایی کنند. با mikroC کار میکنم.

    برنامه transmitter :
    کد:
    #define ADR_LENGTH      5   // 5 bytes TX(RX) address width
#define TX_PLOAD_WIDTH    32  // 16 bytes TX payload
#define RX_PLOAD_WIDTH    32  // 16 bytes RX payload

// Define nRF24L01 interrupt flag's
#define IDLE         0x00 // Idle, no interrupt pending
#define MAX_RT        0x10 // Max #of TX retrans interrupt
#define TX_DS        0x20 // TX data sent interrupt
#define RX_DR        0x40 // RX data received

// SPI(nRF24L01) commands
#define READ_REG       0x00 // Define read command to register
#define WRITE_REG      0x20 // Define write command to register
#define RD_RX_PLOAD     0x61 // Define RX payload register address
#define WR_TX_PLOAD     0xA0 // Define TX payload register address
#define FLUSH_TX       0xE1 // Define flush TX register command
#define FLUSH_RX       0xE2 // Define flush RX register command
#define REUSE_TX_PL     0xE3 // Define reuse TX payload register command
#define NOP         0xFF // Define No Operation, might be used to read status register

// SPI(nRF24L01) registers(addresses)
#define CONFIG        0x00 // 'Config' register address
#define EN_AA        0x01 // 'Enable Auto Acknowledgment' register address
#define EN_RXADDR      0x02 // 'Enabled RX addresses' register address
#define SETUP_AW       0x03 // 'Setup address width' register address
#define SETUP_RETR      0x04 // 'Setup Auto. Retrans' register address
#define RF_CH        0x05 // 'RF channel' register address
#define RF_SETUP       0x06 // 'RF setup' register address
#define STATUS        0x07 // 'Status' register address
#define OBSERVE_TX      0x08 // 'Observe TX' register address
#define CD          0x09 // 'Carrier Detect' register address
#define RX_ADDR_P0      0x0A // 'RX address pipe0' register address
#define RX_ADDR_P1      0x0B // 'RX address pipe1' register address
#define RX_ADDR_P2      0x0C // 'RX address pipe2' register address
#define RX_ADDR_P3      0x0D // 'RX address pipe3' register address
#define RX_ADDR_P4      0x0E // 'RX address pipe4' register address
#define RX_ADDR_P5      0x0F // 'RX address pipe5' register address
#define TX_ADDR       0x10 // 'TX address' register address
#define RX_PW_P0       0x11 // 'RX payload width, pipe0' register address
#define RX_PW_P1       0x12 // 'RX payload width, pipe1' register address
#define RX_PW_P2       0x13 // 'RX payload width, pipe2' register address
#define RX_PW_P3       0x14 // 'RX payload width, pipe3' register address
#define RX_PW_P4       0x15 // 'RX payload width, pipe4' register address
#define RX_PW_P5       0x16 // 'RX payload width, pipe5' register address
#define FIFO_STATUS     0x17 // 'FIFO Status Register' register address

// Definitions used in TEST application
#define FALSE        0x00 // Simple true/false constants
#define TRUE         0x01

#define CLEAR        0x00

#define FREQ_TABLE_SIZE   0x10
#define TX_PLOAD_MAX_WIDTH  0x20
#define RX_PLOAD_MAX_WIDTH  0x20 // RX payload length = 32 bytes
#define NUM_OF_PIPES     0x06
#define TX_ADDR_WIDTH    0x05
#define TRANS_PARAMS     0x02
#define TRANS_SOURCE     0x00
#define TRANS_VALUE     0x01
#define TIMER        0x00
#define BUTTON        0x01
#define TX_MODE       0x00
#define RX_MODE       0x01
#define IDLE_MODE      0x02
#define MASK_IRQ_FLAGS    0x70
#define MASK_RX_DR_FLAG   0x40
#define MASK_TX_DS_FLAG   0x20
#define MASK_MAX_RT_FLAG   0x10
#define RX_P_NO       0x0e

#define RX_FIFO_EMPTY    0x07
#define RX_EMPTY       0x01

#define PIPE0        0x00
#define PIPE1        0x01
#define PIPE2        0x02
#define PIPE3        0x03
#define PIPE4        0x04
#define PIPE5        0x05

#define LINK_STATUS     0x00
#define LINK_CHANNEL     0x01
#define LINK_NO_MESS     0x00
#define LINK_LOSS      0x01
#define LINK_ESTABLISH    0x02
#define LINK_RELOST     0x03
#define STOP         0x04

#define CLEARED       0x00
#define TIMEOUT       0x01

// Implemented HOST commands
#define CSN_STATE      0x01 // Set state of CSN(SSN) signal
#define SPI_COMMAND     0x02 // Perform a SPI read/write operation
#define CE_BIT        0x03 // Set state of CE signal
#define FW_VER        0x04 // Returns FirmWare version of this system
#define READ_USB_ID     0x05 // Returns the rotary switch value
#define WRITE_LEDS      0x06 // Turn LEDs on/off
#define WR_FLASH_BLOCK    0x07 // Writes 32 bytes of flash data to block 'n'
#define RD_FLASH_BLOCK    0x08 // Reads and return 32 bytes of flash block 'n'
#define WR_FLASH_PAGE    0x09 // Writes the flash page n*256 buffer to flash
#define RD_FLASH_PAGE    0x0a // Read the n*256 flash page to flash buffer
#define WD_RESET       0x0b // Perform a WD reset
#define READ_LOCK_BYTE    0x0c // Returns the F32x device lock byte...
#define SPI_SELECT      0x0d // Select between HW and SW SPI mode
#define UNUSED        0x0e // Not used command
#define ST_FR_SWEEP_TX    0x0f // Start freq.sweep, TX, from channel 'cl' to 'ch' in 20ms intervals
#define ST_FR_SWEEP_RX    0x10 // Start freq.sweep, RX, from channel 'cl' to 'ch' in 20ms intervals
#define STOP_SWEEP      0x11 // Stop either the TX or the RX freq.sweep execution....
#define WR_TRANS_CTRL    0x12 // Select between auto. or manual transmission(TX device)
#define RD_TRANS_CTRL    0x13 // Read Transmit Control state
#define WR_FREQ_AGIL     0x14 // Select Freq. Agility for pipe.n
#define RD_FREQ_AGIL     0x15 // Read freq agility state for pipe.n
#define WR_CH_TABLE     0x16 // Writes the 16 ch's used for freq. agility
#define RD_CH_TABLE     0x17 // Read the 16 ch's used for agility
#define WR_TX_PAYLOAD    0x18 // Writes n bytes of payload data
#define START_COM_MODE    0x19 // Starts the communication mode, (application)
#define READ_TEMP      0x1a // Returns F320 temperature
#define READ_VOLT      0x1b // Returns RF_VDD voltage
#define ENTER_TEST_MODE   0x1c // Ev.board enters production test
#define READ_RX_DATA     0x1d // Host read RX data on pipe.n
#define READ_TX_PLOAD    0x1e // Host read current RX payload
#define WR_RX_PLOAD_LENGTH  0x1f // Host write current RX payload length for pipe.n
#define RD_RX_PLOAD_LENGTH  0x20 // Host read current RX payload length for pipe.n
#define WR_FREQ_AGILITY   0x21 // Command to enable/disable frequency agility
#define RD_FREQ_AGILITY   0x22 // Read previous command's parameter
#define UPDATE_DEVICE    0x23 // This command is sent before the nRF24L01 are beeing updated
#define STOP_COMM_MODE    0x24 // This sommand is sent when "Stop Communication Mode" button is pressed
#define RD_COMM_MODE_STAT  0x25 // Host read current communication mode status (0:TX, 1:RX, 2: IDLE)
#define RD_LINK_STATUS    0x26 // Host read current link status, i.e. message to host, RX device side
//-----------------------------------------------------------------------------
//------------------------------------------------------
#define CE  LATC.B2
#define CSN  LATA.B3
///
// Predefine a static pipe address
unsigned char ADDRESS_P0[ADR_LENGTH] = {0x34,0x43,0x10,0x10,0x01};
unsigned char ADDRESS_P1[ADR_LENGTH] = {0xB3,0xB4,0xB5,0xB6,0x02};
unsigned char ADDRESS_P2[ADR_LENGTH] = {0xB3,0xB4,0xB5,0xB6,0x03};
unsigned char ADDRESS_P3[ADR_LENGTH] = {0xB3,0xB4,0xB5,0xB6,0x04};
unsigned char ADDRESS_P4[ADR_LENGTH] = {0xB3,0xB4,0xB5,0xB6,0x05};
unsigned char ADDRESS_P5[ADR_LENGTH] = {0xB3,0xB4,0xB5,0xB6,0x06};

static unsigned int second=0 ;
char txt1[6]="salam";
/////////global functions
void TX_MODE_NRF(void);
unsigned char L01_Clear_IRQ(unsigned char irq_flag);
unsigned char nRF_SPI_RW(unsigned char byte);
unsigned char nRF_SPI_Read(unsigned char reg);
unsigned char nRF_SPI_RW_Reg(unsigned char reg, unsigned char value);
unsigned char nRF_SPI_Write_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes);
unsigned char nRF_SPI_Read_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes);

void main(void){
  PORTA=0x00;
  PORTB=0x00;
  PORTC=0x00;
  //
  TRISA=0xbf;
  TRISB=0x19;
  TRISC=0x13;
  //
  LATA=0x00;
  LATB=0x00;
  LATC=0x00;
  // 
	CE=0;
	CSN=1;
	SPI1_Init_Advanced(_SPI_MASTER_OSC_DIV16, _SPI_DATA_SAMPLE_MIDDLE, _SPI_CLK_IDLE_LOW, _SPI_LOW_2_HIGH);
	delay_ms(1000);
	//
	TX_MODE_NRF();
  while(1){
		nRF_SPI_Write_Buf(WR_TX_PLOAD, &txt1 , 5 );
		delay_ms(500);
  }
}


/**************************************************************************************************
* Function: TX_Mode
*
* Description:
* This function initializes one nRF24L01 device to TX mode, set TX address,
* set RX address for auto.ack, fill TX payload, select RF channel, datarate & TX pwr.
* PWR_UP is set, CRC(2 bytes) is enabled, & PRIM:TX.
*
* ToDo: One high pulse(>10µs) on CE will now send this
* packet and expext an acknowledgment from the RX device.
*
* In/Out parameters:
* In: none
* Out: none
**************************************************************************************************/
void TX_MODE_NRF(void)
{

 CE=0;                   // Set CE pin low to enable stanby mode
nRF_SPI_RW_Reg(FLUSH_TX,0);
nRF_SPI_RW_Reg(FLUSH_RX,0);
 L01_Clear_IRQ(MASK_IRQ_FLAGS);           // Clear interrupts

 nRF_SPI_RW_Reg(WRITE_REG + EN_AA, 0x3f);      // Enable Auto.Ack:Pipes 0-5
 nRF_SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x3f);    // Enable Pipes 0-5
 nRF_SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x1a);    // 500µs + 86µs, 10 retrans...
 nRF_SPI_RW_Reg(WRITE_REG + RF_CH, 40);       // Select RF channel 40

 nRF_SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x0f);     // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
 nRF_SPI_RW_Reg(WRITE_REG + CONFIG, 0x7e);      // Set PWR_UP bit, enable CRC(2 bytes) & Prim:TX. MAX_RT & TX_DS enabled..

 nRF_SPI_Write_Buf(WRITE_REG + TX_ADDR, &ADDRESS_P0, sizeof(ADDRESS_P0));  // Writes TX_Address to nRF24L01
 nRF_SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, &ADDRESS_P0, sizeof(ADDRESS_P0)); // RX_Addr0 same as TX_Adr for Auto.Ack

 Delay_ms(200);
 // This device is now ready to transmit one packet of 16 bytes payload to a RX device at address
 // '3443101001', with auto acknowledgment, retransmit count of 10(retransmit delay of 500µs+86µs)
 // RF channel 40, datarate = 2Mbps with TX power = 0dBm.
}


/**************************************************************************************************
// Function: nRF_SPI_Write_Buf
//
// Description:
// Writes contents of buffer '*pBuf' to nRF24L01
// Typically used to write TX payload, Rx/Tx address
//
// In/Out parameters:
// In: register 'reg' to write, buffer '*pBuf*' contains
// data to be written and buffer size 'buf_size' is #of
// bytes to be written
// Out: return nRF24L01 status byte.
**************************************************************************************************/
unsigned char nRF_SPI_Write_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes)
{
 unsigned char status, byte_ctr;

 CSN = 0;                   // Set CSN low, init SPI tranaction
 status = nRF_SPI_RW(reg);            // Select register to write to and read status byte

 for(byte_ctr=0; byte_ctr<bytes; byte_ctr++)   // then write all byte in buffer(*pBuf)
 {
  nRF_SPI_RW(*pBuf++);
 }
 
 CSN = 1;                   // Set CSN high again

 return(status);                 // return nRF24L01 status byte
}

/**************************************************************************************************
// Function: nRF_SPI_Read_Buf
//
// Description:
// Reads 'bytes' #of bytes from register 'reg'
// Typically used to read RX payload, Rx/Tx address
//
// In/Out parameters:
// In: 'reg', register to read from, '*pBuf' are buffer
// the read bytes are stored to and 'bytes' are #of bytes
// to read.
// Out: return nRF24L01 status byte.
**************************************************************************************************/
unsigned char nRF_SPI_Read_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes)
{
 unsigned char status, byte_ctr;

 CSN = 0;                   // Set CSN low, init SPI tranaction
 status = nRF_SPI_RW(reg);            // Select register to write to and read status byte

 for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)    // Perform SPI_RW to read byte from nRF24L01
 {
  pBuf[byte_ctr] = nRF_SPI_RW(0);
 }
 
 CSN = 1;                   // Set CSN high again

 return(status);                 // return nRF24L01 status byte
}

/**************************************************************************************************
* Function: L01_Clear_IRQ
*
* Description:
* Clear nRF24L01 IRQ flag(s).
*
* In/Out parameters:
* In: IRQ Flag
* Out: Reg state
**************************************************************************************************/
unsigned char L01_Clear_IRQ(unsigned char irq_flag)
{
 return nRF_SPI_RW_Reg(WRITE_REG + STATUS, irq_flag);
}

/**************************************************************************************************
* Function: nRF_SPI_RW
*
* Description:
* Writes one byte to nRF24L01, and return the byte read
* from nRF24L01 during write, according to SPI protocol
*
* In/Out parameters:
* In: 'byte', current byte to be written
* Out: 'SPI2'
**************************************************************************************************/
unsigned char nRF_SPI_RW(unsigned char byte)
{
 return(SPI1_Read(byte));            // Perform HW SPI operation
}

/**************************************************************************************************
// Function: nRF_SPI_Read
//
// Description:
// Read one byte from nRF24L01 register, 'reg'
//
// In/Out parameters:
// In: reg, register to read
// Out: return reg_val, register value.
**************************************************************************************************/
unsigned char nRF_SPI_Read(unsigned char reg)
{
 unsigned char reg_val;

 CSN = 0;                   // CSN low, initialize SPI communication...
 nRF_SPI_RW(reg);                // Select register to read from..
 reg_val = nRF_SPI_RW(0);            // ..then read registervalue
 CSN = 1;                   // CSN high, terminate SPI communication

 return(reg_val);                // return register value
}

/**************************************************************************************************
// Function: nRF_SPI_RW_Reg
//
// Description:
// Writes value 'value' to register 'reg'
//
// In/Out parameters:
// In: 'reg' register to write value 'value' to.
// Return status byte.
**************************************************************************************************/
unsigned char nRF_SPI_RW_Reg(unsigned char reg, unsigned char value)
{
 unsigned char status;

 CSN = 0;                   // CSN low, init SPI transaction
 status = nRF_SPI_RW(reg);            // select register
 nRF_SPI_RW(value);               // ..and write value to it..
 CSN = 1;                   // CSN high again

 return(status);                 // return nRF24L01 status byte
}
    هر وقت خواستید کاری بکنید، چهل سال عقب و چهل سال جلو را در نظر بگیرید. "بابابزرگ"
    برچسب ها: nrf24l01, با, مشکل
    #2
    پاسخ : مشکل با nrf24l01+


    برنامه receiver :

    کد:
    #define ADR_LENGTH      5   // 5 bytes TX(RX) address width
#define TX_PLOAD_WIDTH    32  // 16 bytes TX payload
#define RX_PLOAD_WIDTH    32  // 16 bytes RX payload

// Define nRF24L01 interrupt flag's
#define IDLE         0x00 // Idle, no interrupt pending
#define MAX_RT        0x10 // Max #of TX retrans interrupt
#define TX_DS        0x20 // TX data sent interrupt
#define RX_DR        0x40 // RX data received

// SPI(nRF24L01) commands
#define READ_REG       0x00 // Define read command to register
#define WRITE_REG      0x20 // Define write command to register
#define RD_RX_PLOAD     0x61 // Define RX payload register address
#define WR_TX_PLOAD     0xA0 // Define TX payload register address
#define FLUSH_TX       0xE1 // Define flush TX register command
#define FLUSH_RX       0xE2 // Define flush RX register command
#define REUSE_TX_PL     0xE3 // Define reuse TX payload register command
#define NOP         0xFF // Define No Operation, might be used to read status register

// SPI(nRF24L01) registers(addresses)
#define CONFIG        0x00 // 'Config' register address
#define EN_AA        0x01 // 'Enable Auto Acknowledgment' register address
#define EN_RXADDR      0x02 // 'Enabled RX addresses' register address
#define SETUP_AW       0x03 // 'Setup address width' register address
#define SETUP_RETR      0x04 // 'Setup Auto. Retrans' register address
#define RF_CH        0x05 // 'RF channel' register address
#define RF_SETUP       0x06 // 'RF setup' register address
#define STATUS        0x07 // 'Status' register address
#define OBSERVE_TX      0x08 // 'Observe TX' register address
#define CD          0x09 // 'Carrier Detect' register address
#define RX_ADDR_P0      0x0A // 'RX address pipe0' register address
#define RX_ADDR_P1      0x0B // 'RX address pipe1' register address
#define RX_ADDR_P2      0x0C // 'RX address pipe2' register address
#define RX_ADDR_P3      0x0D // 'RX address pipe3' register address
#define RX_ADDR_P4      0x0E // 'RX address pipe4' register address
#define RX_ADDR_P5      0x0F // 'RX address pipe5' register address
#define TX_ADDR       0x10 // 'TX address' register address
#define RX_PW_P0       0x11 // 'RX payload width, pipe0' register address
#define RX_PW_P1       0x12 // 'RX payload width, pipe1' register address
#define RX_PW_P2       0x13 // 'RX payload width, pipe2' register address
#define RX_PW_P3       0x14 // 'RX payload width, pipe3' register address
#define RX_PW_P4       0x15 // 'RX payload width, pipe4' register address
#define RX_PW_P5       0x16 // 'RX payload width, pipe5' register address
#define FIFO_STATUS     0x17 // 'FIFO Status Register' register address

// Definitions used in TEST application
#define FALSE        0x00 // Simple true/false constants
#define TRUE         0x01

#define CLEAR        0x00

#define FREQ_TABLE_SIZE   0x10
#define TX_PLOAD_MAX_WIDTH  0x20
#define RX_PLOAD_MAX_WIDTH  0x20 // RX payload length = 32 bytes
#define NUM_OF_PIPES     0x06
#define TX_ADDR_WIDTH    0x05
#define TRANS_PARAMS     0x02
#define TRANS_SOURCE     0x00
#define TRANS_VALUE     0x01
#define TIMER        0x00
#define BUTTON        0x01
#define TX_MODE       0x00
#define RX_MODE       0x01
#define IDLE_MODE      0x02
#define MASK_IRQ_FLAGS    0x70
#define MASK_RX_DR_FLAG   0x40
#define MASK_TX_DS_FLAG   0x20
#define MASK_MAX_RT_FLAG   0x10
#define RX_P_NO       0x0e

#define RX_FIFO_EMPTY    0x07
#define RX_EMPTY       0x01

#define PIPE0        0x00
#define PIPE1        0x01
#define PIPE2        0x02
#define PIPE3        0x03
#define PIPE4        0x04
#define PIPE5        0x05

#define LINK_STATUS     0x00
#define LINK_CHANNEL     0x01
#define LINK_NO_MESS     0x00
#define LINK_LOSS      0x01
#define LINK_ESTABLISH    0x02
#define LINK_RELOST     0x03
#define STOP         0x04

#define CLEARED       0x00
#define TIMEOUT       0x01

// Implemented HOST commands
#define CSN_STATE      0x01 // Set state of CSN(SSN) signal
#define SPI_COMMAND     0x02 // Perform a SPI read/write operation
#define CE_BIT        0x03 // Set state of CE signal
#define FW_VER        0x04 // Returns FirmWare version of this system
#define READ_USB_ID     0x05 // Returns the rotary switch value
#define WRITE_LEDS      0x06 // Turn LEDs on/off
#define WR_FLASH_BLOCK    0x07 // Writes 32 bytes of flash data to block 'n'
#define RD_FLASH_BLOCK    0x08 // Reads and return 32 bytes of flash block 'n'
#define WR_FLASH_PAGE    0x09 // Writes the flash page n*256 buffer to flash
#define RD_FLASH_PAGE    0x0a // Read the n*256 flash page to flash buffer
#define WD_RESET       0x0b // Perform a WD reset
#define READ_LOCK_BYTE    0x0c // Returns the F32x device lock byte...
#define SPI_SELECT      0x0d // Select between HW and SW SPI mode
#define UNUSED        0x0e // Not used command
#define ST_FR_SWEEP_TX    0x0f // Start freq.sweep, TX, from channel 'cl' to 'ch' in 20ms intervals
#define ST_FR_SWEEP_RX    0x10 // Start freq.sweep, RX, from channel 'cl' to 'ch' in 20ms intervals
#define STOP_SWEEP      0x11 // Stop either the TX or the RX freq.sweep execution....
#define WR_TRANS_CTRL    0x12 // Select between auto. or manual transmission(TX device)
#define RD_TRANS_CTRL    0x13 // Read Transmit Control state
#define WR_FREQ_AGIL     0x14 // Select Freq. Agility for pipe.n
#define RD_FREQ_AGIL     0x15 // Read freq agility state for pipe.n
#define WR_CH_TABLE     0x16 // Writes the 16 ch's used for freq. agility
#define RD_CH_TABLE     0x17 // Read the 16 ch's used for agility
#define WR_TX_PAYLOAD    0x18 // Writes n bytes of payload data
#define START_COM_MODE    0x19 // Starts the communication mode, (application)
#define READ_TEMP      0x1a // Returns F320 temperature
#define READ_VOLT      0x1b // Returns RF_VDD voltage
#define ENTER_TEST_MODE   0x1c // Ev.board enters production test
#define READ_RX_DATA     0x1d // Host read RX data on pipe.n
#define READ_TX_PLOAD    0x1e // Host read current RX payload
#define WR_RX_PLOAD_LENGTH  0x1f // Host write current RX payload length for pipe.n
#define RD_RX_PLOAD_LENGTH  0x20 // Host read current RX payload length for pipe.n
#define WR_FREQ_AGILITY   0x21 // Command to enable/disable frequency agility
#define RD_FREQ_AGILITY   0x22 // Read previous command's parameter
#define UPDATE_DEVICE    0x23 // This command is sent before the nRF24L01 are beeing updated
#define STOP_COMM_MODE    0x24 // This sommand is sent when "Stop Communication Mode" button is pressed
#define RD_COMM_MODE_STAT  0x25 // Host read current communication mode status (0:TX, 1:RX, 2: IDLE)
#define RD_LINK_STATUS    0x26 // Host read current link status, i.e. message to host, RX device side
//-----------------------------------------------------------------------------
//------------------------------------------------------
#define CE  LATC.B2
#define CSN  LATA.B3

// Lcd pinout settings
sbit LCD_RS at RA0_bit;
sbit LCD_EN at RA2_bit;
sbit LCD_D7 at RB7_bit;
sbit LCD_D6 at RB6_bit;
sbit LCD_D5 at RB5_bit;
sbit LCD_D4 at RB4_bit;

// Pin direction
sbit LCD_RS_Direction at TRISA0_bit;
sbit LCD_EN_Direction at TRISA2_bit;
sbit LCD_D7_Direction at TRISB7_bit;
sbit LCD_D6_Direction at TRISB6_bit;
sbit LCD_D5_Direction at TRISB5_bit;
sbit LCD_D4_Direction at TRISB4_bit;
//
// Predefine a static pipe address
unsigned char ADDRESS_P0[ADR_LENGTH] = {0x34,0x43,0x10,0x10,0x01};
unsigned char ADDRESS_P1[ADR_LENGTH] = {0xB3,0xB4,0xB5,0xB6,0x02};
unsigned char ADDRESS_P2[ADR_LENGTH] = {0xB3,0xB4,0xB5,0xB6,0x03};
unsigned char ADDRESS_P3[ADR_LENGTH] = {0xB3,0xB4,0xB5,0xB6,0x04};
unsigned char ADDRESS_P4[ADR_LENGTH] = {0xB3,0xB4,0xB5,0xB6,0x05};
unsigned char ADDRESS_P5[ADR_LENGTH] = {0xB3,0xB4,0xB5,0xB6,0x06};
//
unsigned int time=0 ,i=0;
char txt1[6],txt2[5];
//
void RX_MODE_NRF(void);
unsigned char L01_Clear_IRQ(unsigned char irq_flag);
unsigned char nRF_SPI_RW(unsigned char byte);
unsigned char nRF_SPI_Read(unsigned char reg);
unsigned char nRF_SPI_RW_Reg(unsigned char reg, unsigned char value);
unsigned char nRF_SPI_Write_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes);
unsigned char nRF_SPI_Read_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes);
//

void main() {
    ANCON0=0x00;
    ANCON1=0x00;
    //
    LATC=LATB=LATA=0X00;
    //
    PORTC=PORTB=PORTA=0X00;
    //
    TRISC=0X93;
    TRISB=0X07;
    TRISA=0Xc0;
    //
    CE=0;
    CSN=1;
    SPI1_Init_Advanced(_SPI_MASTER_OSC_DIV4, _SPI_DATA_SAMPLE_MIDDLE, _SPI_CLK_IDLE_LOW, _SPI_LOW_2_HIGH);
    //
    Lcd_Init();            // Initialize LCD
    Lcd_Cmd(_LCD_CLEAR);       // Clear display
    Lcd_Cmd(_LCD_BLINK_CURSOR_ON);    
    Lcd_Out(1,1,"nrf24l01");
    //
		RX_MODE_NRF(void);
		//
		delay_ms(3000);
    nRF_SPI_Read_Buf( RD_RX_PLOAD, &txt1, 5);
    Lcd_Out(2,1,txt1);
    while(1){
    }
}

void RX_MODE_NRF(void){
    CE = 0;
    nRF_SPI_RW_Reg(FLUSH_TX,0);
    nRF_SPI_RW_Reg(FLUSH_RX,0);
    L01_Clear_IRQ(MASK_IRQ_FLAGS);           // Clear interrupts
    nRF_SPI_RW_Reg(WRITE_REG + EN_AA, 0x3f);       // Enable Auto.Ack:Pipes 0-5
    nRF_SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x3f);     // Enable Pipes 0-5
    nRF_SPI_RW_Reg(WRITE_REG + RF_CH, 40);        // Select RF channel 40

    nRF_SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x0f);      // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
    nRF_SPI_RW_Reg(WRITE_REG + CONFIG, 0x7f);       // Set PWR_UP bit, enable CRC(2 bytes) & Prim:RX. RX_DR enabled..

    nRF_SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, &ADDRESS_P0, sizeof(ADDRESS_P0)); // Use the same address on the RX device as the TX device
    nRF_SPI_Write_Buf(WRITE_REG + RX_ADDR_P1, &ADDRESS_P1, sizeof(ADDRESS_P1));

    nRF_SPI_RW_Reg(WRITE_REG + RX_ADDR_P2, 0x03);
    nRF_SPI_RW_Reg(WRITE_REG + RX_ADDR_P3, 0x04);
    nRF_SPI_RW_Reg(WRITE_REG + RX_ADDR_P4, 0x05);
    nRF_SPI_RW_Reg(WRITE_REG + RX_ADDR_P5, 0x06);

    nRF_SPI_RW_Reg(WRITE_REG + RX_PW_P0, RX_PLOAD_WIDTH); // Select same RX payload width as TX Payload width
    nRF_SPI_RW_Reg(WRITE_REG + RX_PW_P1, RX_PLOAD_WIDTH);
    nRF_SPI_RW_Reg(WRITE_REG + RX_PW_P2, RX_PLOAD_WIDTH);
    nRF_SPI_RW_Reg(WRITE_REG + RX_PW_P3, RX_PLOAD_WIDTH);
    nRF_SPI_RW_Reg(WRITE_REG + RX_PW_P4, RX_PLOAD_WIDTH);
    nRF_SPI_RW_Reg(WRITE_REG + RX_PW_P5, RX_PLOAD_WIDTH);
    
    Delay_ms(200);
    
    CE = 1;
}


/**************************************************************************************************
// Function: nRF_SPI_Write_Buf
//
// Description:
// Writes contents of buffer '*pBuf' to nRF24L01
// Typically used to write TX payload, Rx/Tx address
//
// In/Out parameters:
// In: register 'reg' to write, buffer '*pBuf*' contains
// data to be written and buffer size 'buf_size' is #of
// bytes to be written
// Out: return nRF24L01 status byte.
**************************************************************************************************/
unsigned char nRF_SPI_Write_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes)
{
 unsigned char status, byte_ctr;

 CSN = 0;                   // Set CSN low, init SPI tranaction
 status = nRF_SPI_RW(reg);            // Select register to write to and read status byte

 for(byte_ctr=0; byte_ctr<bytes; byte_ctr++)   // then write all byte in buffer(*pBuf)
 {
  nRF_SPI_RW(*pBuf++);
 }
 
 CSN = 1;                   // Set CSN high again

 return(status);                 // return nRF24L01 status byte
}

/**************************************************************************************************
// Function: nRF_SPI_Read_Buf
//
// Description:
// Reads 'bytes' #of bytes from register 'reg'
// Typically used to read RX payload, Rx/Tx address
//
// In/Out parameters:
// In: 'reg', register to read from, '*pBuf' are buffer
// the read bytes are stored to and 'bytes' are #of bytes
// to read.
// Out: return nRF24L01 status byte.
**************************************************************************************************/
unsigned char nRF_SPI_Read_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes)
{
 unsigned char status, byte_ctr;

 CSN = 0;                   // Set CSN low, init SPI tranaction
 status = nRF_SPI_RW(reg);            // Select register to write to and read status byte

 for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)    // Perform SPI_RW to read byte from nRF24L01
 {
  pBuf[byte_ctr] = nRF_SPI_RW(0);
 }
 
 CSN = 1;                   // Set CSN high again

 return(status);                 // return nRF24L01 status byte
}

/**************************************************************************************************
* Function: L01_Clear_IRQ
*
* Description:
* Clear nRF24L01 IRQ flag(s).
*
* In/Out parameters:
* In: IRQ Flag
* Out: Reg state
**************************************************************************************************/
unsigned char L01_Clear_IRQ(unsigned char irq_flag)
{
 return nRF_SPI_RW_Reg(WRITE_REG + STATUS, irq_flag);
}

/**************************************************************************************************
* Function: nRF_SPI_RW
*
* Description:
* Writes one byte to nRF24L01, and return the byte read
* from nRF24L01 during write, according to SPI protocol
*
* In/Out parameters:
* In: 'byte', current byte to be written
* Out: 'SPI2'
**************************************************************************************************/
unsigned char nRF_SPI_RW(unsigned char byte)
{
 return(SPI1_Read(byte));            // Perform HW SPI operation
}

/**************************************************************************************************
// Function: nRF_SPI_Read
//
// Description:
// Read one byte from nRF24L01 register, 'reg'
//
// In/Out parameters:
// In: reg, register to read
// Out: return reg_val, register value.
**************************************************************************************************/
unsigned char nRF_SPI_Read(unsigned char reg)
{
 unsigned char reg_val;

 CSN = 0;                   // CSN low, initialize SPI communication...
 nRF_SPI_RW(reg);                // Select register to read from..
 reg_val = nRF_SPI_RW(0);            // ..then read registervalue
 CSN = 1;                   // CSN high, terminate SPI communication

 return(reg_val);                // return register value
}

/**************************************************************************************************
// Function: nRF_SPI_RW_Reg
//
// Description:
// Writes value 'value' to register 'reg'
//
// In/Out parameters:
// In: 'reg' register to write value 'value' to.
// Return status byte.
**************************************************************************************************/
unsigned char nRF_SPI_RW_Reg(unsigned char reg, unsigned char value)
{
 unsigned char status;

 CSN = 0;                   // CSN low, init SPI transaction
 status = nRF_SPI_RW(reg);            // select register
 nRF_SPI_RW(value);               // ..and write value to it..
 CSN = 1;                   // CSN high again

 return(status);                 // return nRF24L01 status byte
}
    هر وقت خواستید کاری بکنید، چهل سال عقب و چهل سال جلو را در نظر بگیرید. "بابابزرگ"

    دیدگاه

      #3
      پاسخ : مشکل با nrf24l01+

      من با ccs نوشتم میتونی استفاده کنی ادرس فقط برای دو pipe1 pipe0 5 بایتی هستش نه برای بقیه
      فهبني صبرت علی عذابک فکیف اصبرعلی فراقک
      گیرم که برعذاب توصبر کنم ،چگونه بر جدایی ات شکیبایی ورزم

      دیدگاه

        #4
        پاسخ : مشکل با nrf24l01+

        بله حق با شماست
        دقت کنید در برنامه از اونها استفاده نکردم.
        هر وقت خواستید کاری بکنید، چهل سال عقب و چهل سال جلو را در نظر بگیرید. "بابابزرگ"

        دیدگاه

          #5
          پاسخ : مشکل با nrf24l01+

          سلام به همگی دوستان
          بالاخره ماژول راه افتاد. حالا میخوام مشکلاتی که برنامه داشت را بنویسم تا ان شا الله کار دیگران زودتر راه بیفتد:
          1- در شروع برنامه قبل از اینکه سراغ برنامه ریزی ماژول بروید ، حتماً 10 میلی ثانیه توقف کنید.
          2- به هیچ عنوان قسمت فرستنده نباید بیشتر از 4 میلی ثانیه در حالت TX باقی بماند.
          3- پایه های CE , CSN را درست تنظیم کنید.
          4- آنالوگ و دیجیتال بودن پورت ها را مشخص کنید.
          5- RX-PLOAD-WITDH در سمت گیرنده باید برابر با نعداد دیتایی باشد که در سمت فرستنده قرار است فرستاده شود. البته اگر درحالت static کار کنید.
          6- در قسمت فرستنده بعد از بارگزاری DATA پایه CE به مدت حداکثر 4msec یک شود تا دیتا فرستاده شود.
          هر وقت خواستید کاری بکنید، چهل سال عقب و چهل سال جلو را در نظر بگیرید. "بابابزرگ"

          دیدگاه

            #6
            پاسخ : مشکل با nrf24l01+

            شما با وقفه کار کن که دیگه هیچ احتیاجی به delay نداشته باشه تنها فوت کوزه گری این ماژول
            b. This operating mode pulses the CE high for at least 10μs. This allows one packet to be transmitted.
            This is the normal operating mode. After the packet is transmittet, the nRF24L01 enters standby-I
            mode.
            ///************************************************** ************************************
            void mirf_send_data(int8 WIDTH){
            int8 i=0,merge=0;

            mirf_CSN_lo;
            spi_write(FLUSH_TX);
            mirf_CSN_hi;

            mirf_CE_hi;
            delay_us(50);
            mirf_CSN_lo;
            spi_write(W_TX_PAYLOAD);
            while(i<WIDTH){
            merge=send_buffer ;
            spi_write(merge);
            i++;
            }
            mirf_CSN_hi;

            mirf_CE_hi; // Start transmission
            delay_us(50);
            mirf_CE_lo;

            }
            فهبني صبرت علی عذابک فکیف اصبرعلی فراقک
            گیرم که برعذاب توصبر کنم ،چگونه بر جدایی ات شکیبایی ورزم

            دیدگاه

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