void LCDSendData(unsigned char Data)
{
#ifdef LCD_BUSY_CHECK
LCDBusyWait();
RW_Low();
#else
delay_us(700);
#endif
...
#include <io.h>
#include <sdcard.h>
#include <spi.h>
// System Clocks initialization
void system_clocks_init(void)
{
unsigned char n,s;
// Optimize for speed
#pragma optsize-
// Save interrupts enabled/disabled state
s=SREG;
// Disable interrupts
#asm("cli")
// Internal 32 MHz RC oscillator initialization
// Enable the internal 32 MHz RC oscillator
OSC.CTRL|=OSC_RC32MEN_bm;
// System Clock prescaler A division factor: 1
// System Clock prescalers B & C division factors: B:1, C:1
// ClkPer4: 32000.000 kHz
// ClkPer2: 32000.000 kHz
// ClkPer: 32000.000 kHz
// ClkCPU: 32000.000 kHz
n=(CLK.PSCTRL & (~(CLK_PSADIV_gm | CLK_PSBCDIV1_bm | CLK_PSBCDIV0_bm))) |
CLK_PSADIV_1_gc | CLK_PSBCDIV_1_1_gc;
CCP=CCP_IOREG_gc;
CLK.PSCTRL=n;
// Disable the auto-calibration of the internal 32 MHz RC oscillator
DFLLRC32M.CTRL&= ~DFLL_ENABLE_bm;
// Wait for the internal 32 MHz RC oscillator to stabilize
while ((OSC.STATUS & OSC_RC32MRDY_bm)==0);
// Select the system clock source: 32 MHz Internal RC Osc.
n=(CLK.CTRL & (~CLK_SCLKSEL_gm)) | CLK_SCLKSEL_RC32M_gc;
CCP=CCP_IOREG_gc;
CLK.CTRL=n;
// Disable the unused oscillators: 2 MHz, internal 32 kHz, external clock/crystal oscillator, PLL
OSC.CTRL&= ~(OSC_RC2MEN_bm | OSC_RC32KEN_bm | OSC_XOSCEN_bm | OSC_PLLEN_bm);
// ClkPer output disabled
PORTCFG.CLKEVOUT&= ~PORTCFG_CLKOUT_gm;
// Restore interrupts enabled/disabled state
SREG=s;
// Restore optimization for size if needed
#pragma optsize_default
}
// Ports initialization
void ports_init(void)
{
// PORTC initialization
PORTC.OUT=0x10;
PORTC.DIR=0xB0;
PORTC.PIN0CTRL=PORT_OPC_TOTEM_gc | PORT_ISC_BOTHEDGES_gc;
PORTC.PIN1CTRL=PORT_OPC_TOTEM_gc | PORT_ISC_BOTHEDGES_gc;
PORTC.PIN2CTRL=PORT_OPC_TOTEM_gc | PORT_ISC_BOTHEDGES_gc;
PORTC.PIN3CTRL=PORT_OPC_TOTEM_gc | PORT_ISC_BOTHEDGES_gc;
PORTC.PIN4CTRL=PORT_OPC_TOTEM_gc | PORT_ISC_BOTHEDGES_gc;
PORTC.PIN5CTRL=PORT_OPC_TOTEM_gc | PORT_ISC_BOTHEDGES_gc;
PORTC.PIN6CTRL=PORT_OPC_TOTEM_gc | PORT_ISC_BOTHEDGES_gc;
PORTC.PIN7CTRL=PORT_OPC_TOTEM_gc | PORT_ISC_BOTHEDGES_gc;
PORTC.INTCTRL=(PORTC.INTCTRL & (~(PORT_INT1LVL_gm | PORT_INT0LVL_gm))) |
PORT_INT1LVL_OFF_gc | PORT_INT0LVL_OFF_gc;
PORTC.INT0MASK=0x00;
PORTC.INT1MASK=0x00;
}
// SPIC initialization
void spic_init(void)
{
// SPIC is enabled
// SPI mode: 0
// Operating as: Master
// Data order: MSB First
// SCK clock prescaler: 64
// SCK clock doubled: On
// SCK clock frequency: 1000.000 kHz
SPIC.CTRL=SPI_ENABLE_bm | SPI_MODE_0_gc | (1<<SPI_MASTER_bp) | (0<<SPI_DORD_bp) |
SPI_PRESCALER_DIV64_gc | (1<<SPI_CLK2X_bp);
// SPIC interrupt: Disabled
SPIC.INTCTRL=SPI_INTLVL_OFF_gc;
// Note: The MOSI (PORTC Pin 5), SCK (PORTC Pin 7) and
// /SS (PORTC Pin 4) signals are configured as outputs in the ports_init function.
}
// Macro used to drive the SPIC /SS signal low in order to select the slave
#define SET_SPIC_SS_LOW {PORTC.OUTCLR=SPI_SS_bm;}
// Macro used to drive the SPIC /SS signal high in order to deselect the slave
#define SET_SPIC_SS_HIGH {PORTC.OUTSET=SPI_SS_bm;}
// SPIC transmit/receive function in Master mode
// c - data to be transmitted
// Returns the received data
#pragma used+
unsigned char spic_master_tx_rx(unsigned char c)
{
// Transmit data in Master mode
SPIC.DATA=c;
// Wait for the data to be transmitted/received
while ((SPIC.STATUS & SPI_IF_bm)==0);
// Return the received data
return SPIC.DATA;
}
#pragma used-
void main(void)
{
unsigned char buffer[512];
unsigned char n;
int i;
// Interrupt system initialization
// Optimize for speed
#pragma optsize-
// Make sure the interrupts are disabled
#asm("cli")
// Low level interrupt: Off
// Round-robin scheduling for low level interrupt: Off
// Medium level interrupt: Off
// High level interrupt: Off
// The interrupt vectors will be placed at the start of the Application FLASH section
n=(PMIC.CTRL & (~(PMIC_RREN_bm | PMIC_IVSEL_bm | PMIC_HILVLEN_bm | PMIC_MEDLVLEN_bm | PMIC_LOLVLEN_bm)));
CCP=CCP_IOREG_gc;
PMIC.CTRL=n;
// Set the default priority for round-robin scheduling
PMIC.INTPRI=0x00;
// Restore optimization for size if needed
#pragma optsize_default
// System initialization
system_clocks_init();
ports_init();
spic_init();
disk_initialize(0);
for (i=1;i<512;i++)
{
buffer=i;
}
disk_write(0,buffer,0,512);
while (1)
{
}
}
#include <mega8.h>
#include "mmc.h"
#include <alcd.h>
#include <stdio.h>
#include <delay.h>
char string[]={"this is a test for write"};
//char s[5];
int i;
void main(void)
{
PORTB=0x00;
DDRB=0x2C;
DDRC=0xFF;
MMC_Init();
for (i = 0 ; i < 25; i++)
{
MMC_Buffer[i]=string[i];
}
Write_MMC(2);
delay_ms(10);
//Read_MMC(0);
/*for (i = 0 ; i < 1; i++)
{
sprintf(s,"%c",MMC_Buffer[i]);
} */
while(1){
}
}
#include <spi.h>
#include <delay.h>
#define CS_0 PORTB.2 = 0
#define CS_1 PORTB.2 = 1
unsigned long int MMC_ADR;
unsigned char MMC_Buffer[512];
char Command(char befF, unsigned int AdrH, unsigned int AdrL, char befH )
{ // sends a command to the MMC
CS_0;
spi(0xFF);
spi(befF);
spi((char)(AdrH >> 8));
spi((char)AdrH);
spi((char)(AdrL >> 8));
spi((char)AdrL);
spi(befH);
spi(0xFF);
return spi(0xFF); // return the last received character
}
char MMC_Init(void) { // init spi
char i;
// SPI initialization
// SPI Type: Master
// SPI Clock Rate: 2*4000.000 kHz
// SPI Clock Phase: Cycle Half
// SPI Clock Polarity: Low
// SPI Data Order: MSB First
SPCR=0x50;
SPSR=0x00;
CS_1;
// start MMC in spi mode
for(i=0; i < 10; i++) spi(0xFF); // send 10*8=80 clock pulses
CS_0; // enable MMC
if (Command(0x40,0,0,0x95) != 1) goto mmcerror; // reset MMC
st: // if there is no MMC, prg. loops here
if (Command(0x41,0,0,0xFF) !=0) goto st;
return 1;
mmcerror:
return 0;
}
char Write_MMC(unsigned long int N)
{
unsigned int i;
char c;
MMC_ADR = N;
MMC_ADR *= 512;
// 512 byte-write-mode
if (Command(0x58,(unsigned int)(MMC_ADR >> 16),(unsigned int)(MMC_ADR),0xFF) !=0)
{
return 0;
}
spi(0xFF);
spi(0xFF);
spi(0xFE);
for (i=0;i<512;i++)
{
spi(MMC_Buffer[i]);
}
// at the end, send 2 dummy bytes
spi(0xFF);
spi(0xFF);
c = spi(0xFF);
c &= 0x1F; // 0x1F = 0b.0001.1111;
if (c != 0x05)
{
return 0;
}
// wait until MMC is not busy anymore
i=0;
while(spi(0xFF) != (char)0xFF)
{
if(++i>5000)
{
return 0;
}
delay_ms(1);
}
return 1;
}
char Read_MMC(unsigned long int N)
{
unsigned int i;
MMC_ADR = N;
MMC_ADR *= 512;
if (Command(0x51,(unsigned int)(MMC_ADR >> 16),(unsigned int)(MMC_ADR),0xFF) != 0)
{
return 0;
}
// wait for 0xFE - start of any transmission
// ATT: typecast (char)0xFE is a must!
i = 0;
while(spi(0xFF) != (char)0xFE)
{
if(++i==1000)
{
return 0;
}
delay_ms(1);
}
for(i=0; i < 512; i++)
{
MMC_Buffer[i] = spi(0xFF);
}
// at the end, send 2 dummy bytes
spi(0xFF); // actually this returns the CRC/checksum byte
spi(0xFF);
return 1;
}
//in date 93.07.20 in my office time 13:45
//start project TFT 7 inch in 8 pin data port !
#include"avr_compiler.h"
#define DATAPORT PORTC.OUT //PORTC pin0~7 =D0-7 ssd1963 driver tft 7 inch
#define CONPORT PORTB
#define RS PIN0_bm //PORTB pin0 = RS ssd1963 driver tft 7 inch
#define CS PIN1_bm //PORTB pin1 = CS ssd1963 driver tft 7 inch
#define RD PIN2_bm //PORTB pin2 = RD ssd1963 driver tft 7 inch
#define WR PIN3_bm //PORTB pin3 = WR ssd1963 driver tft 7 inch
#define RT PIN3_bm //PORTD pin3 rest ssd1963 driver tft 7 inch
#define RT2 PIN4_bm //PORTD pin4 (for test one refresh time )
#define sbi2(pin) PORTD.OUTSET = pin
#define cbi2(pin) PORTD.OUTCLR = pin
#define sbi(pin) CONPORT.OUTSET = pin
#define cbi(pin) CONPORT.OUTCLR = pin
#define pulse_high(pin) sbi(pin); cbi(pin);
#define pulse_low(pin) cbi(pin); sbi(pin);
void TFT_WRITE_COM(char VL)
{// cbi(CS);
cbi(RS);
DATAPORT = VL;
pulse_low(WR);
// sbi(CS);
}
void TFT_WRITE_DATA(char VL)
{ // cbi(CS);
sbi(RS);
DATAPORT = VL;
pulse_low(WR);
// sbi(CS);
}
int fcolorr = 0;
int fcolorg = 0;
int fcolorb = 0;
int bcolorr = 0;
int bcolorg = 0;
int bcolorb = 0;
void SetColor(int r, int g, int b)
{
fcolorr = r;
fcolorg = g;
fcolorb = b;
}
void SetBackground(int r, int g, int b)
{
bcolorr = r;
bcolorg = g;
bcolorb = b;
}
void clrxy(void)
{
// Setxy(0, 0, 800, 480);
TFT_WRITE_COM(0x2A);
TFT_WRITE_DATA(0x00);
TFT_WRITE_DATA(0x00);
TFT_WRITE_DATA(0x03); //799 dec = 0x031f
TFT_WRITE_DATA(0x1f);
TFT_WRITE_COM(0x2B);
TFT_WRITE_DATA(0x00);
TFT_WRITE_DATA(0x00);
TFT_WRITE_DATA(0x01); //479 dec = 0x01df
TFT_WRITE_DATA(0xdf);
}
void clrScr(void)
{
int i;
int j;
cbi(CS);
clrxy(); //define all screen 0,0,800,480
TFT_WRITE_COM(0x2C);//write Memory Start
for (j=0; j<480; j++)
{
for(i=0; i<800; i++)
{
TFT_WRITE_DATA(bcolorr);
TFT_WRITE_DATA(bcolorg);
TFT_WRITE_DATA(bcolorb);
}
}
sbi(CS);
}
//2MHz T=0.5us
#define usec 2
void TFTinit(void)
{
sbi2(RT);
sbi(CS);
sbi(RD);
sbi(WR);
sbi(RS);
__delay_cycles(5*usec); //10 usec delay
cbi2(RT);
__delay_cycles(15*usec); //10 usec delay
sbi2(RT);
__delay_cycles(15*usec); //10 usec delay
cbi(CS);
__delay_cycles(10*usec); //10 usec delay
TFT_WRITE_COM(0xE2); //Set PLL
TFT_WRITE_DATA(0x23); //m=35
TFT_WRITE_DATA(0x01); //n=2
TFT_WRITE_DATA(0x04); //Use MN values
__delay_cycles(100*usec); //10 usec delay
TFT_WRITE_COM(0xE0); //Start PLL at 103Mhz
TFT_WRITE_DATA(0x01);
__delay_cycles(100*usec); //10 usec delay
TFT_WRITE_COM(0xE0); //Enable PLL
TFT_WRITE_DATA(0x03);
__delay_cycles(100*usec); //10 usec delay
TFT_WRITE_COM(0x01); //software reset
__delay_cycles(100*usec); //10 usec delay
TFT_WRITE_COM(0xE6); //PCLK speed based off PLL Freq 33Mhz
TFT_WRITE_DATA(0x04); //set new to 34.33 MHZ
TFT_WRITE_DATA(0x93);
TFT_WRITE_DATA(0xe0);
__delay_cycles(100*usec); //10 usec delay
TFT_WRITE_COM(0xB0); //LCD Spcifications
TFT_WRITE_DATA(0x00);
TFT_WRITE_DATA(0x00);
TFT_WRITE_DATA(0x03); //Set HDP 799
TFT_WRITE_DATA(0x1F);
TFT_WRITE_DATA(0x01); //Set VDP 479
TFT_WRITE_DATA(0xDF);
TFT_WRITE_DATA(0x00);
__delay_cycles(100*usec); //10 usec delay
TFT_WRITE_COM(0xB4); //HSYNC
TFT_WRITE_DATA(0x03); //Set HT 1000
TFT_WRITE_DATA(0xE8);
TFT_WRITE_DATA(0x00); //Set HPS 51
TFT_WRITE_DATA(0x33);
TFT_WRITE_DATA(0x08); //Set HPW 8
TFT_WRITE_DATA(0x00); //Set LPS 3
TFT_WRITE_DATA(0x03);
TFT_WRITE_DATA(0x00);
__delay_cycles(100*usec); //10 usec delay
TFT_WRITE_COM(0xB6); //VSYNC
TFT_WRITE_DATA(0x02); //Set VT 530
TFT_WRITE_DATA(0x12);
TFT_WRITE_DATA(0x00); //Set VPS 24
TFT_WRITE_DATA(0x18);
TFT_WRITE_DATA(0x03); //Set VPW 03
TFT_WRITE_DATA(0x00); //Set FPS 23
TFT_WRITE_DATA(0x17);
__delay_cycles(100*usec); //10 usec delay
TFT_WRITE_COM(0xBA);
TFT_WRITE_DATA(0x05); //GPIO[3:0] out 1
__delay_cycles(100*usec); //10 usec delay
TFT_WRITE_COM(0xB8);
TFT_WRITE_DATA(0x07); //GPIO=Input, GPIO[2:0]=output
TFT_WRITE_DATA(0x01); //GPIO0 Normal
__delay_cycles(100*usec); //10 usec delay
TFT_WRITE_COM(0x36); //Rotation
TFT_WRITE_DATA(0x08);
__delay_cycles(100*usec); //10 usec delay
TFT_WRITE_COM(0xF0); //Set pixle interface
TFT_WRITE_DATA(0x00); //no chande 8 bit mode
// _delay_us(1);
__delay_cycles(10*usec); //10 usec delay
TFT_WRITE_COM(0x29); //Turn LCD On
__delay_cycles(10*usec); //10 usec delay
TFT_WRITE_COM(0xBE); //Set BL
TFT_WRITE_DATA(0x06);
TFT_WRITE_DATA(0x80);
__delay_cycles(10*usec); //10 usec delay
TFT_WRITE_DATA(0x01);
TFT_WRITE_DATA(0xF0);
TFT_WRITE_DATA(0x00);
TFT_WRITE_DATA(0x00);
__delay_cycles(10*usec); //10 usec delay
TFT_WRITE_COM(0xD0);
TFT_WRITE_DATA(0x0D);
__delay_cycles(10*usec); //10 usec delay
sbi(CS);
SetColor(255,255,255);
SetBackground(200,255,0);
clrScr();
}
int main( void )
{
__delay_cycles(1000*usec); //10 usec delay
// Set RC32M as clock source
OSC_CTRL|=OSC_RC32MEN_bm;
while(!(OSC_STATUS & OSC_RC32MRDY_bm));
CCP=CCP_IOREG_gc;
CLK_CTRL=CLK_SCLKSEL_RC32M_gc;
PORTC.DIR=0xff; //all port pin are output
PORTB.DIR=0xff; //all port pin are output
PORTD.DIRSET=PIN3_bm; //port D pin 3 is for RT
PORTD.DIRSET=PIN4_bm; //port D pin 3 is for RT
TFTinit();
while(1)
{
sbi2(RT2);
SetBackground(0,0,0);
clrScr();
cbi2(RT2);
SetBackground(40,55,0);
clrScr();
SetBackground(255,255,255);
clrScr();
}
}
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